Top Process Engineer Jobs in Singapore

Owns 3D IC and advanced-package process integration, including TSV and hybrid-bond interfaces, 3D-aware floorplanning, DFM rules, thermal and SI/PI signoff, DFT strategy, and package/substrate co-design. Coordinates foundry, memory-partner, and OSAT deliverables, milestones, yield, reliability, and integration risks through tapeout and assembly. The role establishes 3D integration methodology for high-power AI/HPC products.

Develop and optimize optical active alignment processes for photonic transceiver production. Operate, control, qualify, and buy off alignment equipment; develop alignment algorithms; manage epoxy dispensing and curing; design alignment fixtures; troubleshoot production issues; and collaborate with R&D and manufacturing teams to improve yield, quality, documentation, and continuous improvement.

Leads process engineering support for medical device manufacturing, including automation projects, equipment upgrades, maintenance, calibration, validation, and continuous improvement. Improves machine uptime, yield, output, quality, process capability, and OEE while managing engineering resources, capital expenditures, risk assessments, and compliance. Collaborates with production, technical teams, suppliers, plants, and regulatory stakeholders to maintain safe, efficient, and compliant operations.

Lead development, optimization, and transfer of wafer fabrication processes (thin-film deposition, wafer thinning, thermal processes, implantation) to meet yield, quality, cost, and reliability targets. Drive yield improvement, defect reduction, DOE/SPC experiments, root-cause analysis, and process transfer to high-volume manufacturing. Collaborate cross-functionally, mentor junior staff, and manage supplier process and material improvements.

Lead development, optimization, and transfer of wafer fab processes (thin film, wafer thinning, thermal). Drive yield improvement and defect reduction using SPC/DOE/FMEA, perform root-cause analysis and corrective actions, define control plans and OCAP, support NPI and high-volume transfer, collaborate cross-functionally, mentor junior staff, and interface with suppliers.

Provide on-site customer support and system service for semiconductor equipment, develop and optimize plating and other process flows, design and analyze DOEs, perform statistical data analysis, troubleshoot and perform root cause analysis, and lead small projects while mentoring junior staff.

Develop and optimize optical alignment and assembly processes for photonic products from prototype through NPI and volume manufacturing. Responsibilities include active and passive alignment, epoxy dispensing and curing, equipment qualification, DOE, process characterization, statistical capability analysis, root-cause investigation, yield improvement, documentation, DFM/DFA support, and manufacturing transfer. The engineer will collaborate with R&D, manufacturing, suppliers, quality teams, and contract manufacturers to establish robust processes and production controls.

Lead R&D and operations in advanced metrology processes, develop methods for accuracy and precision, and mentor engineers in a semiconductor manufacturing context.

Lead development, qualification, and supplier management for FR4/PCB substrates (mSAP/Any-Layer HDI). Drive DFM/DFT/DFR, quality control, failure analysis, reliability testing, and support packaging production (SMT, die attach, wire bond, alignment). Interface across design, manufacturing, and global suppliers.

Develop, qualify, and sustain photolithography and etch processes for III-V wafer fabrication. Establish process windows, qualify materials and equipment, perform DOE and statistical analysis, support manufacturing and yield improvement, troubleshoot process excursions, and maintain process control documentation (WI, PFMEA, OCAP, recipes, ECO).

Own and improve wafer-level testing operations, including process development, qualification, production execution, process control, yield improvement, failure debugging, data analysis, documentation, and cycle-time optimization. Lead continuous improvement using DOE, SPC, Six Sigma, and root-cause analysis while collaborating with engineering, quality, supply chain, and manufacturing partners to support product qualification and production ramp.

Lead lithography process development for photonics and power semiconductor platforms within a 200mm fab. Responsibilities include establishing and qualifying processes, troubleshooting process issues, improving stability, robustness, quality, margins, and cost, coordinating with equipment, integration, and customer engineering teams, tracking project milestones, training engineers, and deputizing for the lithography process section manager.

Lead development and optimization of photolithography processes, define specifications, drive process innovations, and collaborate with teams for technology transfer.

The role involves developing and optimizing NAND manufacturing processes, collaborating on technology innovations, managing experiments, and leading initiatives for improvement.

Lead process integration for next-generation 3D NAND: identify module deficiencies, develop and implement process solutions, coordinate R&D-to-manufacturing transfers, drive CSPEC criteria and experiments, and lead cross-functional reviews to improve yield, quality, and manufacturability.

Support lithography operations in a 200mm semiconductor fab by qualifying new processes and equipment, troubleshooting production issues, improving yield, quality, cost, stability, and manufacturing KPIs. Analyze SPC and DOE data using JMP, manage process change and qualification activities, resolve investigations, coordinate with integration and yield teams, track projects, and communicate progress. The role also requires technical documentation, cross-functional collaboration, and compliance with environmental, health, safety, and security policies.

Lead and optimize III-V epitaxial growth processes primarily using MOCVD for semiconductor devices, supporting R&D and production with focus on yield improvement and process quality.

As a Process Engineer, design and optimize manufacturing processes for semiconductor technologies, perform hardware characterization, troubleshoot issues, and engage with customers on technical matters.

Design, execute and analyze semiconductor and display process experiments (focused on plasma etch). Perform hardware characterization, measure film properties, troubleshoot process issues, generate documentation and specifications, collaborate with vendors and customers, and implement new technologies and analytical instrumentation.

Support transfer and ramp of optical metrology/testing processes from R&D to pilot and HVM. Create transfer checklists, train production teams, coordinate cross-functional schedules, manage risks and deliverables, and qualify metrology/testing tools at high-volume manufacturing sites.

Support setup and ramp of BEOL semiconductor manufacturing line: transfer R&D processes to pilot production, design and run experiments, train engineers, coordinate cross-functional teams, track schedules and risks, implement instrumentation and produce technical documentation to enable HVM qualification.

Develop and optimize CMP semiconductor processes for an advanced packaging center. Responsibilities include creating technical analyses, modifying process formulations and controls, establishing SOPs and FMEAs, assessing product requirements, integrating equipment and materials, driving continuous improvement, and collaborating with cross-functional teams while meeting safety and quality standards.

Develop and optimize thin film processes for microelectronic devices, support scaling and integration, and mentor junior engineers.

Lead design-rule and PDK deliverables for advanced 3D NAND, manage DRC waivers and mask reviews, drive program execution, collaborate across process integration, yield, QA, and design teams, design test structures, track milestones, and resolve layout- and database-related process issues to enable high-volume manufacturing.

Develop and integrate advanced CMOS and eNVM semiconductor processes from proof of concept through production release. Responsibilities include creating process flows and recipes, designing test structures, defining specifications, qualifying integrated processes, analyzing yield and reliability issues, resolving defects, and coordinating with device, product, reliability, process, and fab engineering teams.