Top Tech Jobs & Startup Jobs in Singapore

Design and implement large-scale integrated circuits using commercial and in-house EDA tools across advanced 7nm to 2nm process technologies. Manage complete RTL-to-GDS or gates-to-GDS flows, including placement, clock tree synthesis, routing, physical and formal verification, and timing analysis. The role also involves UNIX/Linux and Tcl/Bash scripting, with front-end design and synthesis knowledge preferred.

Design and implement large-scale ASICs using commercial and in-house EDA tools across advanced 7nm to 2nm process technologies. Manage complete RTL-to-GDS or gates-to-GDS flows, including synthesis, placement, clock tree synthesis, routing, physical and formal verification, and timing analysis. Knowledge of GPU, CPU, or DSP architectures, UNIX/Linux, and scripting is advantageous.

Lead test strategy, architecture, and execution for NPI silicon programs from pre-silicon through volume manufacturing. Develop and debug Advantest ATE programs, bring up first-pass silicon, integrate loadboards and probe cards, support DFT implementation, perform PVT characterization, and optimize test coverage and time. Serve as the technical lead across design, DFT, IP, assembly, and test teams.

Leads test strategy, architecture, development, and execution for NPI silicon programs. Develops Advantest ATE programs, brings up first-pass silicon, debugs hardware-software issues, integrates test hardware, supports DFT implementation, performs PVT characterization, and optimizes test coverage and time through high-volume manufacturing transfer.

Lead test strategy and architecture for NPI silicon programs from pre-silicon through mass production. Develop and validate Advantest ATE programs, bring up first-pass silicon, debug hardware-software issues, and conduct PVT characterization. Collaborate on loadboards, probe cards, DFT integration, high-speed interfaces, test coverage, yield, and test-time optimization while serving as the technical lead across design, DFT, IP, assembly, and test teams.

Lead test strategy, architecture, and execution for new-product-introduction silicon programs. Develop Advantest ATE programs, bring up first-pass silicon, debug hardware-software interfaces, support DFT integration, perform PVT characterization, and optimize test coverage and time. Collaborate with design, DFT, IP, PCB, probe-card, assembly, and manufacturing teams from tape-out through qualification and high-volume production.

Designs complex flip-chip BGA packages for high-performance ASICs used in AI, networking, HPC, and 5G. Responsibilities include package layout and routing, high-speed SerDes and RF structures, impedance matching, signal and power integrity, thermal management, manufacturability, reliability, and coordinating multiple projects with global teams and external vendors.

Designs and verifies digital IC layouts for memory, I/O, and standard-cell libraries using Cadence and physical verification tools. Responsibilities include floor planning, hierarchical layout, chip integration, applying process rules, meeting schedules, documenting methodologies, and independently delivering quality layouts. The role may lead or train junior engineers and support new technology reviews. Strong memory-layout experience is emphasized, with analog layout, memory compiler, and SKILL programming experience as advantages. Immediate relocation to Singapore is required.

Develop and integrate DFT architectures for hierarchical SoC and ASIC designs, including scan insertion, test compression, boundary scan, and ATPG. Verify DFT implementations through Verilog and gate-level simulation, analyze fault coverage, and resolve timing challenges. Collaborate with physical design and ATE teams to validate tester patterns, support production readiness, and debug silicon bring-up and test failures.

Develops and supports CAD tool flows for advanced semiconductor process nodes. Responsibilities include resolving design and layout issues, maintaining PDK environments, working with EDA vendors and process teams, developing productivity utilities, supporting physical verification and simulation flows, creating QA infrastructure, documenting tools, and training design engineers.