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Broadcom

Layout Engineer

13 Days Ago
Yishun, SGP
Mid level
Mid level
Semiconductor
The Layout Engineer is responsible for layout design, verification, and adherence to guidelines for quality layouts, requiring experience in custom and analog design.
Top Skills: Cadence Layout Tools VirtuosoCalibreCmos ProcessFinfet ProcessScript ProgrammingSkill ProgrammingSubmicron Process
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Broadcom

Layout Engineer

13 Days Ago
Yishun, SGP
Junior
Junior
Semiconductor
The Layout Engineer will apply layout guidelines for quality layouts, manage schedules, and verify designs while collaborating with the library team.
Top Skills: Cadence Layout Tools VirtuosoCalibre Verification ToolsScript ProgrammingSkill Programming
Broadcom Logo
Broadcom

Layout Engineer

13 Days Ago
Yishun, SGP
Junior
Junior
Semiconductor
Responsible for layout design and verification, including chip integration and physical validations, while adhering to layout guidelines and methodologies.
Top Skills: Cadence Layout Tools VirtuosoCalibre Verification ToolsScript ProgrammingSkill Programming
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Broadcom

Head of APJ Sales, ANS

23 Days Ago
Singapore, SGP
Expert/Leader
Expert/Leader
Semiconductor
Lead the Application, Networking and Security sales organization across APJ, driving strategy and performance in the region.
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