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The Staff Analog Layout Engineer will design high-performance analog circuits, manage project schedules, collaborate with cross-functional teams, and ensure adherence to design guidelines.

The Senior Analog Layout Engineer will run simulations, collaborate on designs, and oversee projects related to analog circuits, ensuring specifications are met.

The Analog Layout Engineer will work on simulations and verifications using Cadence Virtuoso, collaborating on high-speed and precision analog circuits from design to delivery, and mentoring within project teams.

As an Analog Layout Staff Engineer, you'll collaborate globally, conducting simulations and verifications using Cadence Virtuoso, and manage full development cycles for analog circuits.

The role involves designing ESD protection schemes, reviewing designs, collaborating with IP designers, and working on advanced process technologies for analog circuits.

Lead the Test Solutions Engineering team in APAC, focusing on ATE-based test development, new product introduction, and cross-functional collaboration.

Lead the establishment and management of a new Test Solutions Engineering team in the APAC region, ensuring high-quality NPI execution and customer engagement.

The role involves physical design of chips, ensuring integration of multi-disciplinary designs, providing mentoring, and scripting for automation in a collaborative environment.

Design and verify mixed-signal integrated circuits including key components like ADCs, PLLs, and regulators, focusing on high-speed data solutions.

The Senior Staff Analog Layout Engineer will design and verify analog circuits, collaborating with global teams and guiding projects through the full development cycle.