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This role involves leading NAND technology integration, solving technology gaps, designing experiments, and driving technical innovation in memory solutions.

Lead a team of process integration engineers to execute HBM NPI from development through HVM. Own PI readiness, yield ramp, risk mitigation, cross-functional alignment, technical oversight, and talent development while integrating AI-enabled tools and analytics to meet ramp and yield targets.

The DMTS role involves shaping cell film processes, leading innovative engineering programs, mentoring leaders, and driving industry collaborations while addressing complex technical challenges.

The DMTS leads the technical vision for cell film processes, mentoring leaders, solving technical challenges, and driving partnerships for innovation.

The Process & Equipment Engineer will enhance semiconductor processes, focusing on development, yield improvement, cost reduction, and troubleshooting complex issues.

Develop and deploy optimization, simulation, and ML models to improve semiconductor factory capacity, throughput, and cycle time. Partner with cross-functional manufacturing and engineering teams to analyze constraints, run scenario analyses, and deliver data-driven recommendations integrated into production pipelines and decision-support tools.

Lead cross-functional projects to develop Smart Manufacturing solutions using AI/ML and BI to improve wafer output, run rate, equipment uptime, and process harmonization. Gather requirements, prepare data, collaborate with data scientists to build models, develop user-facing applications, integrate with systems, scale global solutions, and measure performance improvements.

Design and deploy advanced process control, automation, and analytics solutions for semiconductor manufacturing. Collaborate with process teams to apply statistical analysis and machine learning, maintain global control applications, develop training, and integrate AI-assisted tools to improve yield, quality, and efficiency.

The role focuses on process development and optimization for Plasma-CVD and Diffusion processes in NAND Flash products. Responsibilities include designing experiments, characterizing processes, collaborating with multi-functional teams, and troubleshooting issues in manufacturing.

Provide strategic and technical leadership for construction engineering governance and Asia regional support for large-scale semiconductor fab programs. Define standards, playbooks, and execution methodologies; lead constructability reviews, commissioning readiness, and multi-discipline teams; support design integration, cost/schedule input, risk mitigation, and global stakeholder alignment to ensure safe, consistent, and high-quality facility delivery.