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This role involves testing semiconductor chips, developing ATE test solutions, creating test plans, collaborating on design, optimizing test flows, and ensuring product quality.

As a Senior Staff Engineer, you will develop ATE test solutions, design high-speed testing hardware, create test plans, and collaborate with cross-functional teams to ensure product quality and optimize testing processes.

Lead a team of analog mixed-signal design engineers to develop advanced circuits for high-speed wireline and optical products, ensuring quality delivery and collaboration across teams.

The Analog Layout Staff Engineer will develop high-speed SerDes and broadband analog products, collaborate on design, and run simulations using Cadence tools.

The Staff Analog Layout Engineer will design, schedule, and lead chip layout projects, collaborate with diverse teams, and optimize layouts for high-performance analog circuits.

Responsible for the design and verification of circuits for high-speed broadband ICs, including developing DV plans and creating test cases.

Design sophisticated CMOS transceiver/SERDES products, investigate architectures, ensure performance targets, perform verification using industry tools, and validate designs with lab testing.