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Yesterday
Singapore, SGP
Senior level
Senior level
Semiconductor
The Staff Layout Engineer will lead chip layout projects, optimize layouts, manage cross-functional teams, and drive product integration in high-performance analog circuit development.
Top Skills: AmpleCadenceCalibre DrcErcLvsPerlSkillSynopsys
Yesterday
Singapore, SGP
Senior level
Senior level
Semiconductor
The Staff Layout Engineer will design and integrate high-performance analog circuits in CMOS, manage project schedules, and collaborate across teams.
Top Skills: AmpleCadenceCalibreCmosPerlSkillSynopsys
Yesterday
Singapore, SGP
Mid level
Mid level
Semiconductor
The Senior Layout Engineer will lead chip layout projects, ensuring adherence to design methodologies and collaborating with various engineering teams while focusing on analog circuit design.
Top Skills: AmpleCadenceCalibreCmosPerlSkillSynopsys
Yesterday
Singapore, SGP
Mid level
Mid level
Semiconductor
The Senior Layout Engineer will lead chip layout projects, collaborate across teams, and innovate layout methodologies in high-performance analog circuit design.
Top Skills: AmpleCadenceCalibreCmosFin-FetPerlSkillSynopsys
3 Days Ago
Singapore, SGP
Senior level
Senior level
Semiconductor
Manage test operations, ensuring tools for NPI milestones are ready, track schedules, and oversee technicians. Collaborate with various teams for test floor capacity and updates.
Top Skills: 5S8DAdvantest 93K TestersAtesEsd ControlsGrrIso-9KMs-OfficeOeeTpmTri-Temp ProbersUltraflex
5 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
As a Principal Engineer, you'll lead new product introduction, validate device features, analyze yield, and improve manufacturing processes in the semiconductor industry.
Top Skills: Adventest 93KAuto Test EquipmentComputer ScienceElectrical EngineeringSemiconductor ManufacturingTest HandlerUltraflexWafer ProberYield Analysis
5 Days Ago
Singapore, SGP
Junior
Junior
Semiconductor
Support the procurement team by executing purchase orders, managing supplier relationships, and participating in cost reduction initiatives while ensuring compliance with company policies.
Top Skills: Erp SystemsOracle
6 Days Ago
Singapore, SGP
Senior level
Senior level
Semiconductor
The Staff Engineer will lead the layout of high-speed analog circuits in advanced CMOS technologies, ensuring successful product integration and team collaboration.
Top Skills: AmpleCadenceCalibreCmosPerlSkillSynopsys
6 Days Ago
Singapore, SGP
Senior level
Senior level
Semiconductor
Seeking a Senior Analog Layout Engineer to lead chip layouts and manage project schedules, ensuring adherence to design guidelines and collaboration across teams.
Top Skills: AmpleCadenceCalibre DrcCmosErcLvsPerlSkillSynopsys
6 Days Ago
Singapore, SGP
Senior level
Senior level
Semiconductor
Seeking a Senior Staff Analog Layout Engineer to lead chip layout projects, ensure compliance with methodologies, and optimize layouts for high-speed products.
Top Skills: AmpleCadenceCalibre DrcCmos Process TechnologiesErcLvsPerlSkillSynopsys
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