Jobs at Silicon Labs

Develop and implement test solutions for RF/analog/mixed-signal SoCs. Collaborate with teams to ensure product reliability and optimize testing processes. Mentor junior engineers and drive improvements in methodologies.

Support new process bring-up and NPI: assess technologies, design and characterize testchips, resolve design obstacles, execute tapeouts and wafer plans, prototype qualification, production launch and ramp, liaise with foundries and operations to improve yield and solve manufacturing issues.

Design and implement digital block architectures and RTL, define block specifications with cross-functional teams, and integrate digital, mixed-signal, and RF IP into SoC infrastructure including bus, memory, clocking, power, and reset management.

Plan and execute wafer fabrication, assembly, and test production to meet customer demand and inventory targets. Monitor WIP, supplier performance, and inventory; resolve capacity and supply issues; manage SAP/APS master data and transactions; coordinate cross-functional stakeholders and support NPI, transfers, and process improvements.

Design, simulate, layout, test, and debug analog/mixed-signal and RF circuit blocks (LDO, ADC, DAC, PLL, OSC, TX/RX). Provide lab characterization, manufacturing support, layout guidance, and contribute to product definition, test program development, and technical knowledge sharing.

The Supplier Quality Engineer ensures high product quality by collaborating with suppliers and cross-functional teams, driving improvements, and resolving quality issues in semiconductor manufacturing.

Assist in developing and debugging test programs for silicon products, work with engineers on load boards, analyze test data, and support production ramp.

Perform back-end digital implementation for mixed-signal SoCs: block/chip floorplanning, place-and-route, clock-tree synthesis, power and timing optimization, parasitic generation, STA, LVS/DRC, signal integrity and rail analysis, data prep for analog/RF IP, PnR flow maintenance and feature development.

The Senior Design Engineer will contribute to digital design, block architecture, SoC integration, verification, and documentation in low-power MCU and wireless products.

Lead product engineering from NPI through launch and early manufacturing ramp. Define test strategies, guardbands, and reliability stress patterns. Analyze yield and test data, drive root-cause analysis and corrective actions, monitor production metrics, design burn-in hardware, support JEDEC/AEC qualification, and mentor junior engineers.

Responsible for detailed design of digital circuits, SoC integration, verification using multiple methods, and documentation of requirements and designs.

Develop digital circuits and SoC for low-power MCU and wireless products, including design, integration, and verification tasks.