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Silicon Labs

Senior Analog Design Engineer

Posted 8 Days Ago
Be an Early Applicant
In-Office
Singapore, SGP
Senior level
In-Office
Singapore, SGP
Senior level
Design, simulate, layout, test, and debug analog/mixed-signal and RF circuit blocks (LDO, ADC, DAC, PLL, OSC, TX/RX). Provide lab characterization, manufacturing support, layout guidance, and contribute to product definition, test program development, and technical knowledge sharing.
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Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

Detailed design of analog/mixed-signal/RF circuits, including design capture, layout, test, evaluation and debugging of prototype ICs and design support for mass production 

Responsibilities 

  • Perform analog/mixed-signal architect, design and layout, simulation for the block-level specifications. 

  • Support RF design and layout, simulation for the block-level specifications. 

  • Be good in lab testing, characterization and troubleshooting. 

  • Develop the innovative new design for patenting or protecting as trade secret. 

  • Provide the guidance to the layout designers for sensitive custom layouts. 

  • Support the product definition, the test program development and the manufacturing/production/customer needs. 

  • Conduct technical sharing. 

  • Be a good team player to work well with internal and external partners. 

Skills You Will Need
Minimum Qualifications:

  • PhD / Master’s/ Bachelors degree in microelectronics/electronics engineering

  • Experience in CMOS analog/mixed-signal designs, such as BG, LDO, ADC, DAC, PLL, OSC, TX or RX. 

  • Knowledge in ESD and Latchup. 

  • Knowledge in behavior modeling VerilogA & VerilogAMS. 

  • Excellent written and verbal presentation skills. 

Benefits & Perks:
You can look forward to the following benefits:

  • Insurance plans with Outpatient cover

  • Flexible work policy

#LI-Hybrid

#LI-DK1

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

Silicon Labs Singapore, Singapore, SGP Office

Singapore, Singapore

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