Teams at Silicon Labs

Plans and coordinates semiconductor production cycles, wafer, assembly, and test releases based on demand and inventory. Monitors WIP, production output, customer orders, supplier delivery, cycle-time performance, purchase orders, inventory audits, and SAP transactions. Works with suppliers and contract manufacturers on materials, shipments, BOMs, and issue resolution. Participates in SAP and Adexa system enhancements as a planning domain expert.

Designs digital circuit blocks and SoC infrastructure, including RTL implementation, IP integration, bus and memory interfaces, clocking, power and reset management. Verifies blocks and mixed-signal/RF integrations using directed, random, assertion-based, modeling, and cosimulation methods. Develops embedded firmware for SoC validation and contributes to architecture, design, verification reviews, technical specifications, reference manuals, and datasheets.

Develops and executes verification plans for SoC, IP, and mixed-signal designs. Builds SystemVerilog/UVM testbenches, creates directed and constrained-random tests, drives coverage closure, develops assertions, analyzes regressions, and debugs RTL across simulation and emulation. Collaborates with architecture, design, firmware, and validation teams; improves automation and CI flows; supports pre- and post-silicon debugging; and mentors junior engineers.