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Bitdeer Group

Senior/Staff Front-End Engineer (IP/PCIe)

Posted 5 Days Ago
Be an Early Applicant
In-Office
Singapore, SGP
Senior level
In-Office
Singapore, SGP
Senior level
Design and implement Verilog RTL for PCIe-related IP blocks, drive verification closure and functional coverage, assist pre- and post-silicon debug, and collaborate with verification and software teams to deliver robust SoC/IP solutions.
The summary above was generated by AI

About Bitdeer:

Bitdeer is a world-leading technology company for Bitcoin mining and AI cloud.
Bitdeer is committed to providing comprehensive Bitcoin mining solutions for its customers. Apart from designing industry-leading ASIC chips and manufacturing mining rigs, the Group handles complex processes involved in computing across the value chain. This includes equipment procurement, transport logistics, datacenter design and construction, equipment management, and network and facility operations. Bitdeer also offers advanced cloud capabilities to customers with a high demand for artificial intelligence.
Headquartered in Singapore, Bitdeer operates globally with a diversified 3 GW energy portfolio, and deploys Bitcoin mining and HPC datacenters in the United States, Bhutan, Norway, Canada, Malaysia, and Ethiopia.

Job Summary:

We are seeking an experienced PCIe IP Design Engineer to develop and implement Verilog RTL for PCIe-related IP blocks and support verification closure. The role involves ensuring functional coverage, contributing to pre-silicon and post-silicon debug activities, and collaborating closely with verification and software teams to deliver robust, high-quality IP solutions.

What you will be responsible for:

  • Implement Verilog RTL for various sections of IPs, especially PCIe.
  • Support in verification closure by ensuring 100% coverage functionality.
  • Contribute to design verification and assist in debugging issues across pre-silicon and post-silicon stages.
  • Support software development.


How you will stand out:

  • Master’s degree (preferred) or Bachelor’s degree in Electrical Engineering, or Computer Engineering, with 5 years or more in a semiconductor or high technology R&D experience would be appreciated.
  • Verilog RTL development experience with industry-standard tools in an SoC/IP environment.
  • Strong understanding of PCIe architecture and logic design.
  • Strong problem-solving and debugging skills.
  • Comfort with scripting languages (Perl, Shell, TCL) to automate design tasks.

What you will experience working with us:

  • A culture that values authenticity and diversity of thoughts and backgrounds;
  • An inclusive and respectable environment with open workspaces and exciting start-up spirit;
  • Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
  • Ability to contribute directly and make an impact on the future of the digital asset industry;
  • Involvement in new projects, developing processes/systems;
  • Personal accountability, autonomy, fast growth, and learning opportunities;
  • Attractive welfare benefits and developmental opportunities such as training and mentoring.

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Bitdeer is committed to providing equal employment opportunities in accordance with country, state, and local laws. Bitdeer does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union. 

HQ

Bitdeer Group Singapore, Singapore, SGP Office

Singapore, Singapore

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