The role involves developing and implementing verification plans for IC designs, writing test cases, analyzing results, and collaborating with teams to resolve design issues.
Responsibilities:
- Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
- Design and develop verification testbenches using industry-standard verification languages and methodologies
- Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
- Review and analyze verification results, and provide feedback to design teams
- Collaborate with design and layout teams to identify and resolve design issues
- Develop new verification methodologies, tools, and techniques, ensuring scalability and
portability - Sign-off mixed signal designs in preparation for tapeout
Requirements:
- B.S. EE and 5+ years of relevant industry experience or equivalent
- Strong understanding of analog and mixed-signal circuit design and verification
principles - Ability to write test plans, present results, and communicate clearly with multi-functional
teams - Have a familiarity with verification methodologies and tools: simulators, waveform
viewers, execution automation, simulation time optimization, and coverage collection - Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
- Excellent debugging, problem-solving and analytical skills
- Strong communication and teamwork skills
- Familiarity with analog behavioral models is a plus
Salary Range: S$80,000 - S$180,000 / year
Top Skills
C
Perl
Python
Simulators
Waveform Viewers
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