About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
You will be part of Marvell’s Central Engineering team, driving the design and development of advanced CMOS transceiver, SERDES, and PLL solutions that power next-generation high-speed connectivity.What You Can Expect
In this role, the successful candidate will:-- Lead the development of high-speed, high-performance SerDes IP in advanced technology nodes (5nm, 3nm, and beyond).
- Design complex IP blocks including, but not limited to, 112G/56G PAM4, 32G PAM2, DDR, Die-to-Die High-Speed Interconnect, and System PLL IPs.
- Collaborate with DSP, analog, and digital design teams on SerDes architecture definition and implementation.
- Provide clear design guidance and technical direction to layout engineering teams.
- Partner with application engineers to define and execute IP characterization and validation plans.
- Support lab bring-up, characterization, and debug of SerDes IPs.
- Collaborate closely with product and customer teams to ensure seamless integration and robust performance.
What We're Looking For
What You Bring to the Role:-- Bachelor’s Degree in Electrical Engineering with 3–5 years of relevant experience, or a Master’s Degree with 1+ years of experience; PhD in Electrical Engineering is also welcome.
- Hands-on experience in high-speed analog mixed-signal design at 7nm process nodes or below.
- Strong background in PAM4, 56G, or 112G SerDes design is highly desirable.
- Proven understanding of high-performance SerDes architecture and development.
- Effective team player who thrives in a collaborative, cross-functional environment.
- Experience in project leadership and SoC integration support is a plus.
- Committed to continuous improvement and helping others excel.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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