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Marvell Technology

Senior Staff Analog Design Engineer

Posted 16 Days Ago
Be an Early Applicant
In-Office
Singapore
Senior level
In-Office
Singapore
Senior level
Design high-speed and high-performance analog circuits, collaborate with architecture and verification teams, and support product validation and customer needs.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

CE-AMS - Join a world-class analog design team providing high performance analog and mixed mode circuits for industry-leading SERDES products. Candidate will have opportunity to architect and design circuits for high performance transceivers and other critical analog functions.

What You Can Expect

  • The candidate will be working on analog design of high-speed and high-performance SerDes in advanced technology nodes, 3nm, 2nm and beyond.

  • Participate in SerDes Architecture Development with DSP, Analog and Digital design teams.

  • Work with the AE for the IP characterization and validation plan

  • Product and customer supporting.

  • Provide instructions to the layout engineers.

What We're Looking For

  • Master’s degree and/or PhD Preferred in Electrical Engineering or related fields with 2+ years of experience.

  • Should have strong analog design fundamentals and experience in designing analog circuit blocks such as PLL, Data Converters, Oscillators and high-speed SerDes blocks (CTLE, FFE, DFE, CDR, PLL, Line driver, etc.).

  • Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must

  • Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.

  • Good understanding of analog layouts in FinFet and its effect on high-speed designs

  • Experienced in system level pre-tape out analog validation

  • Experienced in lab chip bring-up and debugging efforts

  • Strong communication and documentation skills

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-ST1

Top Skills

Ade
Analog Circuit Design
Data Converters
Oscillators
Pll
Serdes
Spectre
Virtuoso

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