The role involves process module ownership in Grind/Trim for 3D NAND, collaborating on process development, improving manufacturability, managing experiments, and leading multi-functional projects.

As a NAND CMOS Process Integration Engineer, you will develop innovative solutions for NAND devices, optimize processes, and coordinate cross-functional teams.

The NTI Yield Analysis Engineer will develop NAND product technologies, analyze yield issues, collaborate with cross-functional teams, and utilize statistical and data mining techniques to enhance product yield and quality.

As a Senior/Principal Engineer, you will develop test strategies for Managed NAND products, collaborate on designs, and analyze electrical failures to improve product quality and yields.

The Senior Engineer will develop test strategies and conduct failure analysis for Managed NAND products, collaborating with cross-functional teams to improve product quality and operational efficiency.

The Process Integration Engineer collaborates with various engineering teams to improve yield and reliability in semiconductor fabrication through data analysis and process optimization.

Manage Finished Goods operations within a 3PL warehouse, optimize processes, ensure metrics are met, lead internal audits and support compliance initiatives.

The Senior/Principal Process Integration Engineer at Micron is responsible for designing and implementing process solutions for 3D NAND product yield and quality, leading cross-functional teams, and driving technology transfer from R&D to manufacturing.

Responsible for optimizing processes to improve product quality and reliability, handling defect analysis, and managing supplier relations.

The principal engineer will drive advancements in NAND development, ensuring reliability and performance of CMOS technology and leading design efforts.

Responsible for full physical failure analysis support for NPI and HVM, certifying compliance with safety protocols, operating analytical tools, leading PFA technicians, and improving analysis processes.

The Senior Planner manages finished goods operations, optimizes processes, collaborates with 3PL, troubleshoots issues, and ensures compliance with metrics.

The Senior/Principal NAND Device Engineer will analyze NAND device characteristics, develop solutions for NAND technologies, and collaborate to enhance memory performance.

Assist engineers in product transfers, process improvements, training, and troubleshooting in semiconductor engineering environments. Support new product developments and ensure quality adherence.

The Process Engineer develops and optimizes processes to enhance NAND product quality, yields, and productivity while solving manufacturing issues.

The internship focuses on enhancing R2R controller technology for chemical and mechanical polishing to improve production processes in the semiconductor industry.

The Satellite Planning Engineer conducts strategic scenario and capital planning analysis, ensuring optimal capacity planning and cost management while collaborating with stakeholders.

The Senior Engineer will lead the alignment and standardization of best-known methods, develop metrics for sustainability, and drive productivity improvements in collaboration with multi-functional teams while maintaining a strong culture of performance and diversity.

Develop and optimize processes for advanced NAND parts, prioritize key technology issues, integrate and troubleshoot processes, manage experiments, and collaborate globally to improve yield and quality.

The Line Planning Program Manager drives strategic project management, improves performance metrics, and facilitates communication across projects while ensuring alignment with company goals and providing necessary training.