Jobs at Marvell Technology

Supports analog and mixed-signal IC design for high-speed optical transceivers and SERDES products. Responsibilities include interpreting specifications, implementing circuits such as PLLs, ADCs, amplifiers, transmitters, and receivers, running circuit simulations and verification with EDA tools, collaborating on layout and validation, participating in design reviews, and documenting methodologies. The role is intended for an Electrical and Electronics Engineering student with knowledge of analog circuits, semiconductor physics, and tools including Spectre, SPICE, MATLAB, and Python.

Supports semiconductor product engineering activities including test program verification, debugging, failure analysis, device characterization, ATE and SLT operations, yield reporting, and engineering analysis. The intern works with test, hardware, design, firmware, and manufacturing teams across NPI, mass production release, and sustaining stages. Responsibilities also include completing a mentored NPI engineering project and supporting test automation, qualification, yield improvement, cost reduction, and quality initiatives.

Develop automated test equipment solutions for custom semiconductor products, including test architecture, bring-up, characterization, screening, yield analysis, and fault root-cause analysis. Collaborate with design, DFT, operations, reliability, and customer teams to define test strategies and ensure product quality, performance, coverage, and high-volume manufacturing readiness. Use programming and scripting in Linux, with potential AI and machine learning applications for data analysis and test optimization.

Supports supply chain planning and execution by analyzing demand, supply, inventory, backlog, and operational data. Develops reports, dashboards, and performance metrics; assists forecasting, planning, inventory management, new product introduction, and production ramp activities. Collaborates cross-functionally, identifies inefficiencies, contributes to automation and continuous improvement, and presents data-driven recommendations. The role also applies analytical tools, forecasting methods, and emerging technologies to improve planning and operational effectiveness.

Develops semiconductor test programs for Advantest 93K platforms, including characterization, production, wafer sort, and high-speed digital testing. Creates test plans, converts simulation patterns to ATE formats, supports DFT/DFM testability reviews, optimizes test flows and yields, reduces test time, and releases production programs. Requires collaboration with design and product engineering teams, technical documentation, problem-solving, and leadership in a fast-paced environment.

Own demand forecasting, supply planning, inventory buffers, wafer starts, assembly loads, and customer on-time delivery for semiconductor products. Collaborate with sales, finance, engineering, marketing, business operations, and external suppliers. Analyze demand and supply data, improve forecast accuracy, manage product transitions, coordinate corrective actions, and oversee vendor and internal project activities.

Intern performs physical layout of high-speed analog mixed-signal semiconductor designs and conducts DRC and LVS verification. The role provides exposure to EDA tools and advanced physical layout techniques while collaborating with the Layout Team. Candidates should be pursuing an undergraduate degree in Computer Science, Electrical Engineering, or a related field, understand semiconductor and circuit design principles, communicate effectively in English, and demonstrate teamwork, problem-solving, diligence, and self-motivation.

Supports semiconductor assembly and test capacity planning through WIP and inventory reporting, dashboard development, data analysis, and automation. The intern will analyze trends and bottlenecks, collaborate with planning, IT, engineering, quality, and test teams, and help standardize information across organizations. The role provides exposure to global semiconductor supply chains and tools including Oracle, Power BI, Power Query, Power Automate, and RPA.

Designs IO pads and ESD solutions for semiconductor products. Responsibilities include analysis, circuit design, layout, verification, and ensuring compliance with design, ESD, and reliability specifications. The role requires a bachelor's degree in electrical engineering, computer science, or a related field, along with basic analog IC design knowledge.

Support Sales Operations through supply and order backlog analysis, data-driven allocation decisions, sample order system administration, user acceptance testing, and process improvement initiatives. Collaborate with international sales teams and cross-functional stakeholders while using analytics, automation, and business systems to improve workflows and support revenue goals.

Business Planning Systems Intern supporting data pipelines, dashboards, data analysis, modeling, automation, documentation, and cross-functional business intelligence projects. The role supports strategic decision-making across Operations and Marketing while using tools such as Power BI, SQL, Python, Claude, and Glean.

Develop basic ATE test programs, characterize semiconductor products, analyze yield and failure data, generate reports and dashboards, and automate weekly yield reporting using Perl and Python. The role also involves understanding processor production flow, test coverage, fault models, and end-to-end yield reporting.

Analog and mixed-signal IC design intern supporting CMOS transceiver, SerDes, D2D, and DDR products. Responsibilities include interpreting specifications, designing circuits such as PLLs, ADCs, regulators, amplifiers, TX/RX, and CDRs, performing circuit simulations and verification with EDA tools, collaborating with digital, layout, and validation teams, participating in design reviews, and documenting methodologies.

Design and validate high-speed hardware, including schematic capture, component selection, PCB layout, simulation, signal and power integrity analysis, hardware bring-up, debugging, and laboratory validation. Collaborate with architecture, validation, and cross-functional engineering teams while documenting design decisions and test results. The role provides hands-on experience across the complete hardware development lifecycle for complex semiconductor and board designs.

Internship supporting AMS and photonics CAD automation for semiconductor design. Responsibilities include developing Python, SKILL, and Tcl scripts; maintaining CAD methodologies, design flows, PDK utilities, and design environments; debugging simulation, LVS, DRC, PEX, and reliability verification issues; and collaborating with analog and optics engineers across APAC and US time zones.

Supports mixed-signal design verification for broadband amplifiers by developing verification plans, testbenches, and test cases; analyzing results; documenting findings; and collaborating with circuit design and layout teams. The role involves transistor-level analog and mixed-signal verification across SiGe BiCMOS and CMOS technologies, using EDA tools and programming languages such as Python and Verilog-A.

Supports semiconductor failure analysis for customer returns, qualification, and production issues. Learns to operate optical/IR microscopes, SAM, curve tracers, and electrical test equipment; assists with RMA analysis, root-cause investigations, 8D reports, reference profile databases, layout conversion automation, and failure-analysis dashboards. Collaborates with cross-functional teams and vendors while developing hands-on laboratory and scripting skills.

Analog Layout Intern supporting analog and mixed-signal integrated circuit layout for high-speed connectivity and broadband applications. Responsibilities include learning device matching, symmetry, floor planning, routing, parasitic awareness, DRC/LVS verification, layout reviews, documentation, collaboration, and potential scripting automation under experienced engineer guidance.

Lead the Test Solutions Engineering team in APAC, focusing on ATE-based test development, new product introduction, and cross-functional collaboration.

Owns end-to-end capacity planning across Marvell’s global OSAT subcontractor network. Develops near- and long-range capacity plans, maintains Kinaxis capacity models, manages constraints and bottlenecks, oversees supplier capacity governance and capital expenditure tracking, and runs scenario planning. Translates planning outputs into operational execution, supports customer fulfillment, builds executive dashboards, and coordinates cross-functional resolution of production issues. Requires semiconductor backend and direct OSAT subcontractor experience, plus S&OP or demand-supply balancing exposure.