Jobs at Marvell Technology

Lead NPI silicon bring-up and product engineering for networking/switch/processor lines. Drive cross-functional yield analysis, statistical data analysis, test development/debug, root-cause resolution, and implement improvements to meet mass-production release goals.

Lead development and support of advanced physical verification (PV) flows and add-on tools. Develop, deploy, and maintain dual Calibre/ICV signoff flows, onboard third-party IP, integrate PV into the CAD platform, mentor engineers, interface with EDA vendors, and support advanced process nodes and 3DIC/PMIC technologies to ensure timely, high-quality PV signoff.

Work with design, test, DFT/DFM and firmware teams to debug and characterize digital/analog circuits, analyze volume data and lab tests to resolve yield and test issues, define manufacturing/test specs, optimize test flows and time, support RMA/customer escalations, and lead new product and package/fab qualification before volume production.

Lead development of ATE test solutions for characterization, production, and wafer sort on Advantest/Teradyne. Design high-speed ATE hardware, create test plans, convert design patterns to ATE format, collaborate with DFx and Design to improve yield and testability, optimize test flows, and release production test programs.

Lead product test setup, transfer and mass-production testing for semiconductor products. Build and run test programs/hardware, perform failure analysis and software/hardware debugging, resolve device/test issues, improve yield and reduce costs, and support customer return verification. Provide continuous improvement of test efficiency, throughput, and hardware across Asian test sites; short-notice travel required.

Leads semiconductor product engineering for server and network processors, including digital and analog performance debugging, yield and test optimization, manufacturing specification development, production test flow improvements, customer escalation support, and new product, package, and fab qualification. Collaborates with design, test, hardware, firmware, DFT, DFM, process, and quality teams to improve yield, quality, test time, and defect metrics.

Lead semiconductor product engineering activities for server and network processors, including ATE test development, product characterization, yield optimization, test-flow improvement, and production qualification. Collaborate with design, hardware, firmware, DFT/DFM, process, and test teams to resolve yield, quality, test-time, and customer issues. Support wafer sort, final test, SLT, RMA analysis, package and fab qualifications, and new-product launches.

Lead development of ATE test solutions and hardware on Advantest/Teradyne platforms; create test plans; convert design patterns to ATE; collaborate with DFx and design teams; optimize test flows to improve yields and reduce test time; release production test programs and support wafer sort and characterization.

Develop and lead automated test equipment solutions for semiconductor chip characterization, production, and wafer sort. Design high-speed test hardware, create test plans, convert simulation patterns to ATE formats, optimize test flows and yields, and release production test programs. Collaborate with design, DFX, and product engineering teams to ensure testability and customer specification compliance.