Jobs at Marvell Technology

Lead the design of sophisticated CMOS transceiver products, overseeing team performance and ensuring successful transitions from concept to production.

Lead high-speed and high-performance SerDes development in advanced technology nodes. Design IPs including SerDes DDR, and support IP characterization and debugging.

The Principal Hardware Design Engineer will lead system architecture design and modeling for high-speed hardware, ensuring alignment with SI and PI requirements while influencing design standards and practices.

Lead the design and development of high-speed validation boards, ensuring performance through collaboration with multiple teams. Perform system-level validation and optimize channel performance.

The role involves analog design of high-speed SerDes, collaborating on architecture development, supporting product and customers, and guiding layout engineers.

This role involves testing semiconductor chips, developing ATE test solutions, creating test plans, collaborating on design, optimizing test flows, and ensuring product quality.

Lead full lifecycle execution for custom silicon programs, driving cross-functional teams to ensure schedule, quality, and cost, while managing risks and relationships with stakeholders.

As a Senior Staff Engineer, you will develop ATE test solutions, design high-speed testing hardware, create test plans, and collaborate with cross-functional teams to ensure product quality and optimize testing processes.

Lead a team of analog mixed-signal design engineers to develop advanced circuits for high-speed wireline and optical products, ensuring quality delivery and collaboration across teams.

Responsible for the design and verification of circuits for high-speed broadband ICs, including developing DV plans and creating test cases.

The Analog Layout Staff Engineer will develop high-speed SerDes and broadband analog products, collaborate on design, and run simulations using Cadence tools.

The Staff Analog Layout Engineer will design, schedule, and lead chip layout projects, collaborate with diverse teams, and optimize layouts for high-performance analog circuits.

The Immigration & Global Mobility Specialist manages immigration processes, ensures compliance, and coordinates relocation services while supporting employees in multiple regions, primarily in Singapore.

Design sophisticated CMOS transceiver/SERDES products, investigate architectures, ensure performance targets, perform verification using industry tools, and validate designs with lab testing.

The Staff Analog Layout Engineer will design high-performance analog circuits, manage project schedules, collaborate with cross-functional teams, and ensure adherence to design guidelines.

The Senior Analog Layout Engineer will run simulations, collaborate on designs, and oversee projects related to analog circuits, ensuring specifications are met.

The Analog Layout Engineer will work on simulations and verifications using Cadence Virtuoso, collaborating on high-speed and precision analog circuits from design to delivery, and mentoring within project teams.

As an Analog Layout Staff Engineer, you'll collaborate globally, conducting simulations and verifications using Cadence Virtuoso, and manage full development cycles for analog circuits.

The role involves designing ESD protection schemes, reviewing designs, collaborating with IP designers, and working on advanced process technologies for analog circuits.

Lead the Test Solutions Engineering team in APAC, focusing on ATE-based test development, new product introduction, and cross-functional collaboration.