Teams at Broadcom

Lead development, optimization, qualification, and manufacturing transfer of III-V epitaxial growth and wafer fabrication processes for semiconductor devices. Responsibilities include MOCVD process development, yield and quality improvement, NPI support, troubleshooting, technology transfer, data analytics, AI/ML, statistical process control, advanced characterization, and failure analysis.

Design and implement large-scale integrated circuits using commercial and in-house EDA tools across advanced 7nm to 2nm process technologies. Manage complete RTL-to-GDS or gates-to-GDS implementation flows, including placement, clock tree synthesis, routing, physical and formal verification, and timing analysis. Apply UNIX/Linux and Tcl or Bash scripting, with front-end design and synthesis knowledge beneficial.

Develop and verify DFT architectures for hierarchical SoC and ASIC designs. Responsibilities include scan and test point insertion, test compression, SSN topology validation, boundary scan integration, ATPG pattern generation, fault coverage analysis, gate-level verification, and STIL/WGL pattern validation. Collaborate with physical design and ATE teams, support silicon bring-up, and debug production test failures using Siemens Tessent and scripting languages.