Jobs at Ambiq

Define and drive SoC architecture for low-power wearable/IoT products. Produce specifications, IP selection, power/performance models, integration specs, and support FPGA bring-up, RTL/gate-level debug, post-silicon validation, and cross-functional alignment with hardware, software, and product teams.

Lead verification of digital and mixed-signal SoC designs. Develop block, subsystem, and chip-level test plans; implement scalable UVM/SystemVerilog testbenches; write C-based SoC tests; apply power-aware CPF/UPF flows; automate randomized testing and scoreboards; debug, perform root-cause analysis, track coverage metrics, and collaborate with design and software teams to deliver chips to spec.

Lead architecture, development, integration, and validation of imaging subsystem firmware and drivers for ARM Cortex-M SoCs. Port, optimize, and debug camera interfaces (MIPI CSI-2), video codecs, and image pipelines across pre-silicon FPGA and post-silicon platforms. Enable sensor bring-up, calibration, and performance tuning; support verification, field engineers, and customers; and optimize for real-time, memory, and power-constrained embedded systems.

Lead development and bring-up of DSP software environment: design/port HAL for DSP peripherals, evaluate/port RTOS/schedulers, implement boot and IPC/RPC protocols, create tests/examples, support pre- and post-silicon verification, performance optimization, and customer support for DSP workloads.

Design, implement, and debug Bluetooth radio firmware for the Apollo Blue family. Develop features, optimize performance and power, write tests, support FAEs, triage validation issues, produce technical documentation, and collaborate cross-functionally to integrate wireless components.

Lead the development and testing of Ambiq's Zephyr software, including driver and software testcase development, maintaining compliance, and solving issues in collaboration with global teams.

The Senior Embedded Software Engineer will develop, integrate, and verify SDKs for SoC platforms, lead HAL and driver development, and validate embedded systems through collaboration across teams.

Design and implement low-power DFT architecture for ultra-low-power SoCs: scan insertion, boundary scan, MBIST and ATPG; generate and optimize structural test vectors; run pre/post-layout simulations; collaborate with designers and test engineers to resolve timing, power, and logical issues and bring up tests on silicon.

Develop, implement, and debug FPGA images for pre-silicon prototyping using Xilinx and Intel toolchains. Collaborate with SoC design, software, verification, and test teams to define timing constraints, support regression test suites, reproduce and triage issues pre- and post-silicon, and perform lab bring-up and instrument-based debugging.

Design and optimize ultra-low-power embedded SRAM and register file IPs, develop/enhance SRAM compilers, implement memory peripheral circuits, perform timing/power/low-voltage characterization, correlate silicon measurements, drive yield improvements, build automation scripts, and support IP integration through production.

The Senior Embedded Graphics Software Engineer develops and maintains GPU software stacks, collaborates on graphics APIs, and supports pre- and post-silicon testing.