Supports block-level physical implementation for ultra-low-power SoC designs, including floorplanning, placement, clock tree synthesis, routing, timing closure, static timing analysis, power and signal integrity analysis, DRC/LVS closure, and automation scripting. Collaborates with RTL, verification, and physical design engineers while documenting results and learning industry-standard semiconductor design workflows.

Develop and test the Ambiqsuite SDK for Ambiq SoC devices and emulation platforms. Extend HALs, BSPs, and device drivers for new MCU platforms; create SDK examples and reliability test cases; investigate issues and propose solutions; and build Python automation scripts for SDK development, builds, and verification.

Leads physical implementation of analog IC subsystems including PMUs, clocking, and data converters. Responsibilities include floorplanning, transistor-level layout, matching, shielding, parasitic extraction, LVS/DRC closure, tape-out, validation, production test support, and layout review. Collaborates with analog, digital, RTL, physical design, product, and applications engineering teams. This is an onsite role requiring five days per week.