Top Engineering Jobs in Singapore

Provides technical leadership for SSD firmware validation across enterprise, data center, and automotive products. Owns validation strategy, test architecture, automation frameworks, quality systems, CI/CD pipelines, reliability testing, and manufacturing readiness. Leads root-cause analysis of complex firmware issues, defines coverage and quality metrics, mentors engineers, and influences product roadmaps. The role also applies AI-assisted tools to improve validation efficiency, data analysis, automation, and engineering quality.

The NAND Design Rule Manager leads a team in developing and producing advanced 3D NAND technologies, manages design rules and PDK deliverables, collaborates across technical teams for quality assurance, and drives continuous improvement in processes.

The FECOS cPIE Standardization & Metrics Engineer will drive standardization efforts, develop metrics, implement change management, and promote collaboration across teams to enhance productivity and effectiveness.

Lead development and delivery of wafer/cube probe test solutions for HBM devices across NPI to HVM. Drive probe test plans, ATE program development, silicon debug, data-driven yield improvements, probe hardware validation, cost and test-time optimization, and cross-functional alignment. Mentor engineers and standardize probe practices to ensure production readiness and sustained issue closure.

Lead development and optimization of wet etch unit processes for advanced NAND, drive experiments and DoE, integrate processes with cross-functional teams, troubleshoot yield/quality issues, evaluate hardware, generate IP, implement process monitoring/control, and collaborate globally including suppliers while incorporating AI-assisted tools.

Coordinate and optimize New Product Introduction timelines with engineering and manufacturing teams. Improve product yield, line performance, inventory management, and scheduling through analytics, automation, and AI-enabled tools. Build reporting and indices to achieve best-in-class cycle times and foster continuous improvement.

The Principal Engineer coordinates advanced thin film process development for NAND memory technology, focusing on innovation, technical strategy, and team leadership.

Lead cross-functional semiconductor process integration efforts to improve fab yield and reliability. Design, run, and analyze experiments, collaborate with global fab teams, communicate module issues, and standardize best-known methods to optimize processes and forecast yield and output.

Own probe strategy and silicon learning from pre-silicon staging through first-silicon bring-up to HVM. Define probe coverage, limits, guard-bands, and test flows; drive yield, quality, and test-cost outcomes. Collaborate with Design, DFT, DV, Process Integration, Backend Test, and Reliability. Perform device characterization, failure analysis, and data-driven optimization using analytics and AI to enable manufacturable, scalable probe solutions.

Lead probe strategy and silicon learning from pre-silicon staging through first-silicon bring-up and HVM. Define probe coverage, limits, and guard-bands using silicon characterization. Collaborate with Design, DFT, DV, Process Integration, Backend Test, and Reliability to drive yield, quality, cost, and test-efficiency improvements. Enable NPI, perform device characterization, root-cause analysis, and apply data/AI for probe and test optimization.