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Marvell Technology

Staff Hardware Design Engineer

Reposted 3 Days Ago
Be an Early Applicant
In-Office
Singapore
Mid level
In-Office
Singapore
Mid level
The role involves designing high speed SOC validation boards, collaborating with various engineering teams on board schematic and layout, and ensuring design meets validation requirements.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As a Hardware Design Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Storage, Security, and Networking. You’ll be part of the Central engineering team designing boards for many different groups at Marvell. Additionally, Marvell is designing more complex chips and boards than our competitors, for higher speeds than anyone else. We’re on the leading edge of this technology and you’ll love being a part of this.

What You Can Expect

What You will Do

Within the Central engineering, you will have opportunity to contribute to design and implementing our high speed SOC validation boards.

This includes working with the board Schematic, Layout and SI/PI design team members to ensure the board will meet the demanding validation cycle.

Additional opportunities include collaboration with the package design and signal integrity teams to ensure package and board parameters are well understood.

What We're Looking For

• Bachelor’s and/or Master’s degree in Electrical Engineering or related fields and 3-5 years of related professional experience.
• Experience with high speed routing including PAM, DDR, and PCIe.
• Experience with larger board formats and layer counts.
• Experience routing and balancing differential pairs.
• Experience with Cadence Allegro preferably.
• Experience with setting up routing constraints is a plus.
• Experience with auto routing control is a plus.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Top Skills

Auto Routing Control
Cadence Allegro
Ddr
Differential Pairs
Electrical Engineering
High Speed Routing
Pam
Pcie
Soc Validation

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