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Marvell Technology

Staff Engineer, Digital IC Design

Posted 5 Days Ago
Be an Early Applicant
In-Office
Singapore
Mid level
In-Office
Singapore
Mid level
The role involves designing full custom integrated circuits, writing RTL code, performing timing closure, and collaborating with engineers to support product evaluations.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels and high-performance processors. These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. You will be part of the team working on Preamplifier and providing full custom integrated circuit solution for magnetic hard disk drives development.

What You Can Expect

  • Write RTL code for Low power and multi-clock domain designs.
  • Perform synthesis and pre- and post-layout timing closure.
  • Run the whole front-end design flow such as Synthesis, power analysis, and normal check etc.
  • Contribute test specifications and support evaluation of the design in coordination with application and product engineering.
  • Provide design documentation, descriptions and information to application engineers, field application engineers, products engineers, and customers.

What We're Looking For

  • Major in EE, CS or related, Master Degree with 2+ years or Bachelor with 4+ years working experiences in ASIC design.
  • Familiar with Verilog and RTL design
  • Good problem solving and communication skills
  • Good written and spoken English. Be able to work together with global team.
  • Familiar with System-Verilog and UVM verification methodology is a plus
  • Familiar with script languages (perl, tcl etc.) is a plus
  • Familiar with STA timing flow is a plus

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-VL1

Top Skills

Perl
Rtl
System Verilog
Tcl
Uvm
Verilog

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