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GlobalFoundries

Snr Engineer Process Engineering

Posted 3 Days Ago
Be an Early Applicant
In-Office
Singapore
Mid level
In-Office
Singapore
Mid level
Analyze SPC charts, monitor critical SPC data, improve process efficiency, and collaborate with teams to troubleshoot and optimize processes in semiconductor manufacturing. Responsible for training support staff and ensuring compliance with quality standards.
The summary above was generated by AI
• Analyze SPC charts using SPACE. Know all the PR rules and their significance. Do proper annotation to maintain quality troubleshooting rate for SPC OOC. Understand Cp and Cpk indices.
• Monitor critical SPC charts daily. Perform process window study and provide improvement plan to reduce OOC and improve CPK.
• Review ESPC charts using SPACE. Know all the rules for ESPC.
• Analyze split lot, DOE data, ET, sort yield using JMP, Klarity ACE.
• Create SPC charts, DCOP and modify SLDB using PROMIS (Si-View).
• Upload recipe, check recipe and ensure recipe content compliance using RMS.
• Raise PCRB and understand the requirement for PCRB opening, follow through with qual plan, analyze data using required software and CR closure.
• Follow up on SPSR, MRB, 8D, TECN, or spec update with ECN.
• Setup and troubleshoot in recipes/ job files in all metrology tools within the Module.
• Follow up on passdown to troubleshoot process issues. Establish CAS / procedures to be followed and work with other departments for resolution if required.
• Startup and qualify new process and new equipment within scheduled timeline. Work closely with Equipment Engineer on new equipment acceptance. Know the concept of repeatability and reproducibility (R&R) run.
• Work on reducing process constraint so that Mfg can have more flexibility.
• Perform process matching between equipments to reduce variation and analysis / DOE to find factors for better tool matching.
• Participate in CIP programs to optimize process window, cost, yield, and productivity.
• Work as a team with both Equipment and Mfg Engineers to meet Module objectives. Work to meet the key indices of Uptime and OEE goals.
• Represent own Module to attend cross-functional task team to address yield improvement/ excursion issues. Follow up with cross-fab benchmarking activities to engage the best-in-campus practices across fabs.
• Self-audit and update specifications/ documentation to meet TS16949 Quality Standard requirements.
• Follow good housekeeping and safety rules in office and FAB.
• Provide feedback/ training to AEs or Techs on their troubleshooting skills, understanding of processes, decision making, risk assessment.
• Set Expectations for AE as instructed by Section Manager.
• Provide monthly report to Supervisor.
• Participate in wafer scrap reduction. Ensure no human error.
• Responsible and accountable for complying with and implementing environmental, health, safety and security (EHSS) system, policies, procedures and guidelines that are applicable to your scope of work, thereby maintaining a healthy and safe workplace.

 Strong understanding of epitaxial growth principles: Homoepitaxy vs. Heteroepitaxy, selective epitaxy, and stress engineering.

 Familiarity with RTP processes and metrology techniques for epi layer characterization.

 Proficiency in SPC tools (SPACE, JMP) and FMEA analysis.

 Knowledge of wafer fabrication flow and interaction with other modules.

Preferred Qualifications

  • Bachelor’s or Master’s in Materials Science, Chemical Engineering, or related field.
  • Experience in semiconductor epitaxy processes (Example: SiGe) 1-2 years
  • Hands-on experience with epitaxy tools (e.g., ASM Epsilon, AMAT platforms).
  • WSQ-certified or equivalent training in epitaxy process management.

Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia

 

Top Skills

Jmp
Klarity Ace
Promis
Rms
Space

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