HBM Principal Component Validation Engineer

Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

Responsibilities

• Test program development SME:
  • Drive and develop and maintain test programs for HBM component validation
  • Deliver on‑time test program releases aligned with validation milestones and drive code quality, reviews, and release best-practices.
  • Drive best-in-class test time optimization and parallelism improvements
  • Drive test stability and repeatability across sites and equipment
  • Drive test program debug on MBIST and native mode testers
  • Coach and develop technical growth of other engineers in validation approaches, platform nuances, simulation methodology, and reporting standards.

• Test Infrastructure:
  • Drive test equipment qualification and re‑qualification
  • Drive hardware readiness setup for handler, socket etc.
  • Perform validation capacity forecasting based on product ramps and coverage needs
  • Owns validation platform health, availability and uptime.
  • Support validation platform pathfinding.

• Other responsibilities may include (and not limited to):
  • Define/implement new standards for continuous improvement in test pattern development and validation test infrastructure.
  • Validating high-speed I/O and assist with eye diagram and signal integrity checks.
  • Maintaining documentation in Confluence/Jira and version control in Git/Perforce.
  • Drive root cause analysis sessions and corrective action closure.
  • Drive/ collaborate across Component Validation team and with cross-functional teams for design validation, execution, electrical failure analysis, lab support and others.

Minimum Qualifications

• Bachelor/Master’s degree in Electrical & Electronic or Computer Engineering (or related) with 10+ years proven experience in semiconductor product engineering (DRAM/HBM preferred) with hands-on test pattern and code development experience using C/C++, Python on ATE (Teradyne, Advantest etc) and familiarity with APG (Algorithmic Pattern Generator).
• 8+ years relevant experience as Product Development Engineering technical lead.
• Demonstrated relevant work experience in DFT/ functional testing (loopback, MBIST, scan etc) and relevant knowledge in Computer Architecture/DRAM concepts and flows.

Additional requirements:

• Applicants with relevant experience in Analog Mixed Signal design and verification or ASIC design and verification or silicon validation may be considered.
• Relevant experience implementing AI, automation and continuous improvement initiatives. Strong communication, analytical and problem-solving skills; ability to work in a fast-paced environment.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact [email protected]

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