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Broadcom

ASIC Physical Design Engineer

Posted Yesterday
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Remote
Hiring Remotely in Yishun, SGP
Senior level
Remote
Hiring Remotely in Yishun, SGP
Senior level
Design and implement large-scale (100–400M gate) ASICs using commercial and in-house EDA tools across advanced process nodes. Execute full RTL-to-GDS/Gates-to-GDS flow including placement, CTS, routing, physical and formal verification, and timing analysis. Require UNIX/Linux and scripting (tcl, bash); front-end synthesis knowledge is advantageous.
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Job Description:

Skills and responsibilities:

Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. Placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis).
Some knowledge of front end design and synthesis is advantageous
Proficiency in UNIX/Linux and scripting languages, e.g. tcl, bash

Required Qualifications:

Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
Minimum of 5 years or more experience in a relevant field.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

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