Jobs at Astera Labs

Design and verify mixed-signal IC circuits, including PLL, DLL, and ADC. Collaborate on high-speed data transmission circuit design using advanced CMOS technology.

The Analog/Mixed-Signal Layout Engineer will design and validate ASIC components, focusing on VLSI with an emphasis on high-speed interfaces and verification methodologies. Exposure to RTL languages and tools is required.

Design and verify advanced mixed-signal IC products, focusing on complex circuits like PLLs, ADCs, and regulators, while collaborating across teams.

The Senior Physical Design Engineer will manage physical design from RTL to GDSII, ensuring timing and power closure, and collaborate on advanced technology nodes for multi-gigabit transceivers.